Cookies helfen uns bei der Bereitstellung unserer Dienste. Durch die Nutzung unserer Dienste erklären Sie sich damit einverstanden, dass wir Cookies setzen.
De En Es
Kundenservice: +49 (0) 551 - 547 24 0

Cuvillier Verlag

30 Jahre Kompetenz im wissenschaftlichen Publizieren
Internationaler Fachverlag für Wissenschaft und Wirtschaft

Cuvillier Verlag

Premiumpartner
De En Es
Titelbild-leitlinien
GaN-Based HEMTs for High Voltage Operation: Design, Technology and Characterization

Printausgabe
EUR 41,10 EUR 39,05

E-Book
EUR 28,77

GaN-Based HEMTs for High Voltage Operation: Design, Technology and Characterization (Band 22)

Eldad Bahat-Treidel (Autor)

Vorschau

Inhaltsverzeichnis, Datei (79 KB)
Leseprobe, Datei (400 KB)

ISBN-13 (Printausgabe) 9783954040940
ISBN-13 (E-Book) 9783736940949
Sprache Englisch
Seitenanzahl 220
Umschlagkaschierung matt
Auflage 1. Aufl.
Buchreihe Innovationen mit Mikrowellen und Licht. Forschungsberichte aus dem Ferdinand-Braun-Institut, Leibniz-Institut für Höchstfrequenztechnik
Band 22
Erscheinungsort Göttingen
Promotionsort TU Berlin
Erscheinungsdatum 08.06.2012
Allgemeine Einordnung Dissertation
Fachbereiche Physik
Elektrotechnik
Beschreibung

Gallium nitride (GaN)-based High Electron Mobility Transistors (HEMTs) for high voltage, high power switching and regulating for space applications are studied in this work. Efficient power switching is associated with operation in high OFF-state blocking voltage while keeping the ON-state resistance, the dynamic dispersion and leakage currents as low as possible. The potential of such devices to operate at high voltages is limited by a chain of factors such as subthreshold leakages and the device geometry. Blocking voltage enhancement is a complicated problem that requires parallel methods for solution; epitaxial layers design, device structural and geometry design, and suitable semiconductor manufacturing technique.

In this work physical-based device simulation as an engineering tool was developed. An overview on GaN-based HEMTs physical based device simulation using Silvaco-“ATLAS” is given. The simulation is utilized to analyze, give insight to the modes of operation of the device and for design and evaluation of innovative concepts. Physical-based models that describe the properties of the semiconductor material are introduced. A detailed description of the specific AlGaN/GaN HEMT structure definition and geometries are given along with the complex fine meshing requirements. Nitride-semiconductor specific material properties and their physical models are reviewed focusing on the energetic band structure, epitaxial strain tensor calculation in wurtzite materials and build-in polarization models. Special attention for thermal conductivity, carriers’ mobility and Schottky-gate-reverse-bias-tunneling is paid. Empirical parameters matching and adjustment of models parameters to match the experimental device measured results are discussed.

An enhancement of breakdown voltage in AlxGa1-xN/GaN HEMT devices by increasing the electron confinement in the transistor channel using a low Al content AlyGa1-yN back-barrier layer structure is systematically studied. It is shown that the reduced sub-threshold drain-leakage current through the buffer layer postpones the punch-through and therefore shifts the breakdown of the device to higher voltages. It is also shown that the punch-through voltage (VPT) scales up with the device dimensions (gate to drain separation). An optimized electron confinement results both, in a scaling of breakdown voltage with device geometry and a significantly reduced sub-threshold drain and gate leakage currents. These beneficial properties are pronounced even further if gate recess technology is applied for device fabrication. For the systematic study a large variations of back-barrier epitaxial structures were grown on sapphire, n-type 4H-SiC and semi-insulating 4H-SiC substrates. The devices with 5 μm gate-drain separation grown on n-SiC owning Al0.05Ga0.95N and Al0.10Ga0.90N back-barrier exhibit 304 V and 0.43 m × cm2 and 342 V and 0.41 m × cm2 respectively. To investigate the impact of AlyGa1-yN back-barrier on the device properties the devices were characterized in DC along with microwave mode and robustness DC-step-stress test. Physical-based device simulations give insight in the respective electronic mechanisms and to the punch-through process that leads to device breakdown.

Systematic study of GaN-based HEMT devices with insulating carbon-doped GaN back-barrier for high voltage operation is also presented. Suppression of the OFF-state sub-threshold drain leakage-currents enables breakdown voltage enhancement over 1000 V with low ON-state resistance. The devices with 5 μm gate-drain separation on SI-SiC and 7 μm gate-drain separation on n-SiC exhibit 938 V and 0.39 m × cm2 and 942 V and 0.39 m × cm2 respectively. Power device figure of merit of ~2.3 × 109 V2/-cm2 was calculated for these devices. The impacts of variations of carbon doping concentration, GaN channel thickness and substrates are evaluated. Trade-off considerations in ON-state resistance and of current collapse are addressed.

A novel GaN-based HEMTs with innovative planar Multiple-Grating-Field-Plates (MGFPs) for high voltage operation are described. A synergy effect with additional electron channel confinement by using a heterojunction AlGaN back-barrier is demonstrated. Suppression of the OFF-state sub-threshold gate and drain leakage-currents enables breakdown voltage enhancement over 700 V and low ON-state resistance of 0.68 m × cm2. Such devices have a minor trade-off in ON-state resistance, lag factor, maximum oscillation frequency and cut-off frequency. Systematic study of the MGFP design and the effect of Al composition in the back-barrier are described. Physics-based device simulation results give insight into electric field distribution and charge carrier concentration depending on field-plate design.

The GaN superior material breakdown strength properties are not always a guarantee for high voltage devices. In addition to superior epitaxial growth design and optimization for high voltage operation the device geometrical layout design and the device manufacturing process design and parameters optimization are important criteria for breakdown voltage enhancement. Smart layout prevent immature breakdown due to lateral proximity of highly biased interconnects. Optimization of inter device isolation designed for high voltage prevents substantial subthreshold leakage. An example for high voltage test device layout design and an example for critical inter-device insulation manufacturing process optimization are presented.

While major efforts are being made to improve the forward blocking performance, devices with reverse blocking capability are also desired in a number of applications. A novel GaN-based HEMT with reverse blocking capability for Class-S switch-mode amplifiers is introduced. The high voltage protection is achieved by introducing an integrated recessed Schottky contact as a drain electrode. Results from our Schottky-drain HEMT demonstrate an excellent reverse blocking with minor trade-off in the ON-state resistance for the complete device. The excellent quality of the forward diode characteristics indicates high robustness of the recess process. The reverse blocking capability of the diode is better than –110 V. Physical-based device simulations give insight in the respective electronic mechanisms.

Zusammenfassung

In dieser Arbeit wurden Galliumnitrid (GaN)-basierte Hochspannungs-HEMTs (High Electron Mobility Transistor) für Hochleistungsschalt- und Regelanwendungen in der Raumfahrt untersucht. Effizientes Leistungsschalten erfordert einen Betrieb bei hohen Sperrspannungen gepaart mit niedrigem Einschaltwiderstand, geringer dynamischer Dispersion und minimalen Leckströmen. Dabei wird das aus dem Halbleitermaterial herrührende Potential für extrem spannungsfeste Transistoren aufgrund mehrerer Faktoren aus dem lateralen und dem vertikalen Bauelementedesign oft nicht erreicht. Physikalisch-basierte Simulationswerkzeuge für die Bauelemente wurden daher entwickelt. Die damit durchgeführte Analyse der unterschiedlichen Transistorbetriebszustände ermöglichte das Entwickeln innovativer Bauelementdesignkonzepte. Das Erhöhen der Bauelementsperrspannung erfordert parallele und ineinandergreifende Lösungsansätze für die Epitaxieschichten, das strukturelle und das geometrische Design und für die Prozessierungstechnologie. Neuartige Bauelementstrukturen mit einer rückseitigen Kanalbarriere (back-barrier) aus AlGaN oder Kohlenstoff-dotierem GaN in Kombination mit neuartigen geometrischen Strukturen wie den Mehrfachgitterfeldplatten (MGFP, Multiple-Grating-Field-Plate) wurden untersucht. Die elektrische Gleichspannungscharakterisierung zeigte dabei eine signifikante Verringerung der Leckströme im gesperrten Zustand. Dies resultierte bei nach wie vor sehr kleinem Einschaltwiderstand in einer Durchbruchspannungserhöhung um das etwa Zehnfache auf über 1000 V. Vorzeitige Spannungsüberschläge aufgrund von Feldstärkenspitzen an Verbindungsmetallisierungen werden durch ein geschickt gestaltetes Bauelementlayout verhindert. Eine Optimierung der Halbleiterisolierung zwischen den aktiven Strukturen führte auch im kV-Bereich zu vernachlässigbaren Leckströme. Während das Hauptaugenmerk der Arbeit auf der Erhöhung der Spannungsfestigkeit im Vorwärtsbetrieb des Transistors lag, ist für einige Anwendung auch ein rückwärtiges Sperren erwünscht. Für Schaltverstärker im S-Klassenbetrieb wurde ein neuartiger GaN-HEMT entwickelt, dessen rückwärtiges Sperrverhalten durch einen tiefgelegten Schottkykontakt als Drainelektrode hervorgerufen wird. Eine derartige Struktur ergab eine rückwärtige Spannungsfestigkeit von über 110 V.